|
If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
Datasheet File OCR Text: |
(R) FAST CMOS OCTAL REGISTERED TRANSCEIVERS DESCRIPTION: IDT29FCT52A/B/C IDT29FCT53A/B/C Integrated Device Technology, Inc. FEATURES: * Equivalent to AMD's Am2952/53 and National's 29F52/53 in pinout/function * IDT29FCT52A/53A equivalent to FASTTM speed * IDT29FCT52B/53B 25% faster than FAST * IDT29FCT52C/53C 37% faster than FAST * IOL = 64mA (commercial) and 48mA (military) * IIH and IIL only 5A max. * CMOS power levels (2.5mW typ. static) * TTL input and output level compatible * CMOS output level compatible * Available in 24-pin DIP, SOIC, 28-pin LCC with JEDEC standard pinout * Product available in Radiation Tolerant and Radiation Enhanced versions * Military product compliant to MIL-STD-883, Class B The IDT29FCT52A/B/C and IDT29FCT53A/B/C are 8-bit registered transceivers manufactured using an advanced dual metal CMOS technology. Two 8-bit back-to-back registers store data flowing in both directions between two bidirectional buses. Separate clock, clock enable and 3-state output enable signals are provided for each register. Both A outputs and B outputs are guaranteed to sink 64mA. The IDT29FCT52A/B/C is a non-inverting option of the IDT29FCT53A/B/C. FUNCTIONAL BLOCK DIAGRAM(1) CPA CEA A0 A1 A2 A3 A4 A5 A6 A7 D0 CE CP Q0 D1 D2 Q1 Q2 OEB B0 B1 B2 B3 B4 B5 B6 B7 D3 Q3 A D4 Reg. Q4 D5 D6 D7 Q5 Q6 Q7 Q0 Q1 Q2 Q3 D0 D1 D2 D3 B Q4 Reg. D4 Q5 D5 Q6 D6 Q7 CE CP D7 OEA NOTE: 1. IDT29FCT52 function is shown. CPB CEB 2533 drw 01 The IDT logo is a registered trademark of Integrated Device Technology, Inc. FAST is a trademark of National Semiconductor Co. MILITARY AND COMMERCIAL TEMPERATURE RANGES (c)1992 Integrated Device Technology, Inc. MAY 1992 DSC-4605/3 7.1 1 IDT29FCT52A/B/C, IDT29FCT53A/B/C FAST CMOS OCTAL REGISTERED TRANSCEIVERS MILITARY AND COMMERCIAL TEMPERATURE RANGES PIN CONFIGURATIONS INDEX B7 B6 B5 B4 B3 B2 B1 B0 OEB CPA CEA GND 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 P24-1, D24-1, E24-1 & SO24-2 21 20 19 18 17 16 15 14 13 DIP/CERPACK/SOIC TOP VIEW CPA CEA GND NC CEB CPB OEA LCC TOP VIEW Vcc A7 A6 A5 A4 A3 A2 A1 A0 OEA CPB CEB B5 B6 B7 NC Vcc A7 A6 4 3 2 1 28 27 26 25 24 23 5 6 7 8 9 10 11 12 13 14 15 16 17 18 B4 B3 B2 NC B1 B0 OEB L28-1 22 21 20 19 A5 A4 A3 NC A2 A1 A0 2533 drw 02 PIN DESCRIPTION Name A0-7 B0-7 CPA I/O I/O I/O I I Description Eight bidirectional lines carrying the A Register inputs or B Register outputs. Eight bidirectional lines carrying the B Register inputs or A Register outputs. Clock for the A Register. When CEA is LOW, data is entered into the A Register on the LOW-to-HIGH transition of the CPA signal. Clock Enable for the A Register. When CEA is LOW, data is entered into the A Register on the LOW-to-HIGH transition of the CPA signal. When CEA is HIGH, the A Register holds its contents, regardless of CPA signal transitions. Output Enable for the A Register. When OEB is LOW, the A Register outputs are enabled onto the B0-7 lines. When OEB is HIGH, the B0-7 outputs are in the high-impedance state. CEA OEB CPB I I I Clock for the B Register. When CEB is LOW, data is entered into the B Register on the LOW-to-HIGH transition of the CPB signal. Clock Enable for the B Register. When CEB is LOW, data is entered into the B Register on the LOW-to-HIGH transition of the CPB signal. When CEB is HIGH, the B Register holds its contents, regardless of CPB signal transitions. Output Enable for the B Register. When OEA is LOW, the B Register outputs are enabled onto the A0-7 lines. When OEA is HIGH, the A0-7 outputs are in the high-impedance state. 2533 tbl 01 CEB OEA I REGISTER FUNCTION TABLE(1) (Applies to A or B Register) D X L H Inputs CP X OUTPUT CONTROL(1) Internal Y-Outputs 52 Z L H 53 Z H L 2533 tbl 03 CE H L L Internal Q NC L H Function Hold Data Load Data 2533 tbl 02 OE H L L Q X L H Function Disable Outputs Enable Outputs NOTE: 1. H = HIGH Voltage Level L = LOW Voltage Level X = Don't Care NC = No Change = LOW-to-HIGH Transition 7.1 2 IDT29FCT52A/B/C, IDT29FCT53A/B/C FAST CMOS OCTAL REGISTERED TRANSCEIVERS MILITARY AND COMMERCIAL TEMPERATURE RANGES ABSOLUTE MAXIMUM RATINGS(1) Symbol Rating Commercial -0.5 to +7.0 Military -0.5 to +7.0 Unit V VTERM(2) Terminal Voltage with Respect to GND (3) VTERM Terminal Voltage with Respect to GND TA Operating Temperature TBIAS Temperature Under Bias TSTG Storage Temperature PT Power Dissipation DC Output Current IOUT CAPACITANCE (TA = +25C, f = 1.0MHz) Symbol CIN CI/O Parameter(1) Input Capacitance I/O Capacitance Conditions VIN = 0V VOUT = 0V Typ. 6 8 Max. 10 12 Unit pF pF -0.5 to VCC -0.5 to VCC V 0 to +70 -55 to +125 -55 to +125 0.5 120 -55 to +125 -65 to +135 -65 to +150 0.5 120 C C C W mA NOTE: 2533 tbl 05 1. This parameter is guaranteed by characterization data and not tested. NOTES: 2533 tbl 04 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. No terminal voltage may exceed +0.5V unless otherwise noted. 2. Inputs and VCC terminals only. 3. Outputs and I/O terminals only. DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: VLC = 0.2V; VHC = VCC - 0.2V Commercial: TA = 0C to +70C, VCC = 5.0V 5%; Military: TA = -55C to +125C, VCC = 5.0V 10% Symbol VIH VIL IIH IIL IIH IIL VIK IOS VOH Parameter Input HIGH Level Input LOW Level Input HIGH Current (Except I/O Pins) Input LOW Current (Except I/O Pins) Input HIGH Current (I/O Pins Only) Input LOW Current (I/O Pins Only) Clamp Diode Voltage Short Circuit Current Output HIGH Voltage Vcc = Min., IN = -18mA Vcc = Max. , VO = GND Vcc = 3V, VIN = VLC or VHC, IOH = -32A Vcc = Min. VIN = VIH or VIL VOL Output LOW Voltage IOH = -300A IOH = -15mA MIL. IOH = -24mA COM'L. Vcc = 3V, VIN = VLC or VHC, IOL = 300A Vcc = Min. VIN = VIH or VIL IOL = 300A IOL = 48mA MIL.(5) IOL = 64mA COM'L. (5) (3) Test Conditions(1) Guaranteed Logic HIGH Level Guaranteed Logic LOW Level VCC = Max. VI =VCC VI = 2.7V VI = 0.5V VI = GND VCC = Max. VI = VCC VI = 2.7V VI = 0.5V VI = GND Min. 2.0 -- -- -- -- -- -- -- -- -- -- -60 VHC VHC 2.4 2.4 -- -- -- -- Typ.(2) -- -- -- -- -- -- -- -- -- -- -0.7 -120 VCC VCC 4.0 4.0 GND GND 0.3 0.3 Max. -- 0.8 5 5(4) -5(4) -5 15 15 (4) Unit V V A A -15(4) -15 -1.2 -- -- -- -- -- VLC VLC (4) V mA V V 0.55 0.55 NOTES: 2533 tbl 06 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25C ambient and maximum loading. 3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second. 4. This parameter is guaranteed but not tested. 5. These are maximum IOL values per output, for 8 outputs turned on simultaneously. Total maximum IOL (all outputs) is 512mA for commercial and 384mA for military. Derate IOL for number of outputs exceeding 8 turned on simultaneously. 7.1 3 IDT29FCT52A/B/C, IDT29FCT53A/B/C FAST CMOS OCTAL REGISTERED TRANSCEIVERS MILITARY AND COMMERCIAL TEMPERATURE RANGES POWER SUPPLY CHARACTERISTICS VLC = 0.2V; VHC = VCC - 0.2V Symbol ICC ICC ICCD Parameter Quiescent Power Supply Current Quiescent Power Supply Current TTL Inputs HIGH Dynamic Power Supply Current(4) Test Conditions(1) VCC = Max. VIN VHC; VIN VLC Vcc = Max. VIN = 3.4V(3) Vcc = Max. Outputs Open OEA or OEB= GND One Input Toggling 50% Duty Cycle Vcc = Max. Outputs Open fCP = 10MHz 50% Duty Cycle OEA or OEB= GND One Bit Toggling at fi = 5MHz 50% Duty Cycle VCC = Max. Outputs Open fCP = 10MHz 50% Duty Cycle OEA or OEB = GND Eight Bits Toggling at fi = 2.5MHz 50% Duty Cycle VIN VHC VIN VLC Min. -- -- -- Typ.(2) 0.5 0.5 0.15 Max. 1.5 2.0 0.25 Unit A mA mA/ MHz IC Total Power Supply Current(6) VIN VHC VIN VLC (FCT) -- 2.0 4.0 mA VIN = 3.4V VIN = GND VIN VHC VIN VLC (FCT) -- 2.5 6.0 -- 4.3 7.8(5) VIN = 3.4V VIN = GND -- 6.5 16.8(5) NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25C ambient. 3. Per TTL driven input (VIN = 3.4V); all other inputs at VCC or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply calculations. 5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested. 6. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ICC DHNT + ICCD (fCP/2 + fiNi) ICC = Quiescent Current ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Output Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) fi = Input Frequency Ni = Number of Inputs at fi All currents are in milliamps and all frequencies are in megahertz. 2533 tbl 07 7.1 4 IDT29FCT52A/B/C, IDT29FCT53A/B/C FAST CMOS OCTAL REGISTERED TRANSCEIVERS MILITARY AND COMMERCIAL TEMPERATURE RANGES SWITCHING CHARACTERISTICS OVER OPERATING RANGE IDT29FCT52A/53A Com'l. Symbol tPLH tPHL tPZH tPZL tPHZ tPLZ tSU Parameter Propagation Delay CPA, CPB to An, Bn Output Enable Time OEA or OEB to An or Bn Output Disable Time OEA or OEB to An or Bn Set-up Time HIGH or LOW An, Bn to CPA, CPB Hold Time HIGH or LOW An, Bn to CPA, CPB Set-up Time HIGH or LOW CEA, CEB to CPA, CPB Hold Time HIGH or LOW CEA, CEB to CPA, CPB Pulse Width, HIGH(3) or LOW CPA or CPB CL = 50pF RL = 500 2.0 1.5 10.0 10.5 Mil. 2.0 1.5 11.0 13.0 IDT29FCT52B/53B Com'l. 2.0 1.5 7.5 8.0 2.0 1.5 Mil. 8.0 8.5 IDT29FCT52C/53C Com'l. 2.0 1.5 6.3 7.0 Mil. 2.0 1.5 7.3 8.0 ns ns Condition(1) Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Unit 1.5 10.0 1.5 10.0 1.5 7.5 1.5 8.0 1.5 6.5 1.5 7.5 ns 2.5 -- 2.5 -- 2.5 -- 2.5 -- 2.5 -- 2.5 -- ns tH 2.0 -- 2.0 -- 1.5 -- 1.5 -- 1.5 -- 1.5 -- ns tSU 3.0 -- 3.0 -- 3.0 -- 3.0 -- 3.0 -- 3.0 -- ns tH 2.0 -- 2.0 -- 2.0 -- 2.0 -- 2.0 -- 2.0 -- ns tW 3.0 -- 3.0 -- 3.0 -- 3.0 -- 3.0 -- 3.0 -- ns 2533 tbl 08 NOTES: 1. See test circuit and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. This parameter is guaranteed but not tested. 7.1 5 IDT29FCT52A/B/C, IDT29FCT53A/B/C FAST CMOS OCTAL REGISTERED TRANSCEIVERS MILITARY AND COMMERCIAL TEMPERATURE RANGES TEST CIRCUITS AND WAVEFORMS TEST CIRCUITS FOR ALL OUTPUTS VCC 500 VIN Pulse Generator RT D.U.T. 50pF CL 500 V OUT 7.0V SWITCH POSITION Test Open Drain Disable Low Enable Low All Other Tests Switch Closed Open DEFINITIONS: 2533 tbl 09 CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. SET-UP, HOLD AND RELEASE TIMES DATA INPUT t SU TIMING INPUT ASYNCHRONOUS CONTROL PRESET CLEAR ETC. SYNCHRONOUS CONTROL PRESET CLEAR CLOCK ENABLE ETC. t REM 3V 1.5V 0V 3V 1.5V 0V tH 3V 1.5V 0V 3V 1.5V 0V PULSE WIDTH LOW-HIGH-LOW PULSE tW HIGH-LOW-HIGH PULSE 1.5V 1.5V t SU tH PROPAGATION DELAY 3V 1.5V tPLH OUTPUT t PLH OPPOSITE PHASE INPUT TRANSITION tPHL 3V 1.5V 0V t PHL 0V VOH 1.5V VOL ENABLE AND DISABLE TIMES ENABLE CONTROL INPUT t PZL OUTPUT NORMALLY SWITCH LOW CLOSED t PZH OUTPUT SWITCH NORMALLY OPEN HIGH 3.5V 1.5V 0.3V t PHZ 0.3V 1.5V 0V V OH 0V t PLZ DISABLE 3V 1.5V 0V 3.5V V OL SAME PHASE INPUT TRANSITION NOTES 2533 drw 04 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH. 2. Pulse Generator for All Pulses: Rate 1.0 MHz; ZO 50; tF 2.5ns; tR 2.5ns. 7.1 6 IDT29FCT52A/B/C, IDT29FCT53A/B/C FAST CMOS OCTAL REGISTERED TRANSCEIVERS MILITARY AND COMMERCIAL TEMPERATURE RANGES ORDERING INFORMATION IDT29FCT XXX Device Type X Package X Process/ Temperature Range Blank B Commercial (0C to +70C) Military (-55C to +125C) Compliant to MIL-STD-883, Class B Plastic DIP CERDIP CERPACK Leadless Chip Carrier Small Outline IC P D E L SO 52A 53A 52B 53B 52C 53C Non-Inverting Octal Registered Transceiver Inverting Octal Registered Transceiver Fast Non-Inverting Octal Registered Transceiver Fast Inverting Octal Registered Transceiver Super Fast Non-Inverting Octal Registered Transceiver Super Fast Inverting Octal Registered Transceiver 2533 drw 03 7.1 7 |
Price & Availability of IDT29FCT52A |
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |